projects / vhdl / shortlog
| 2025-06-29 | rs | Move power-on-reset into host_ctrl | commit | commitdiff | tree | snapshot |
| 2025-06-29 | rs | Add new Wishbone address mapper | commit | commitdiff | tree | snapshot |
| 2025-06-29 | rs | Update cpu0 test programs | commit | commitdiff | tree | snapshot |
| 2025-06-29 | rs | Remove trailing whitespace | commit | commitdiff | tree | snapshot |
| 2025-06-28 | rs | Add Wishbone docs to cpu and remove debug signals | commit | commitdiff | tree | snapshot |
| 2025-06-28 | rs | Add documentation to VGA interface | commit | commitdiff | tree | snapshot |
| 2025-06-28 | rs | Add Wishbone datasheet to RS232 UART | commit | commitdiff | tree | snapshot |
| 2025-06-28 | rs | Add more documentation for PS2 and RS232 ifaces | commit | commitdiff | tree | snapshot |
| 2025-06-28 | rs | Add documentation in nexys2 library | commit | commitdiff | tree | snapshot |
| 2025-06-28 | rs | Add license | commit | commitdiff | tree | snapshot |
| 2025-06-28 | rs | Initial commit | commit | commitdiff | tree | snapshot |