From baeb5ec0f1e191d8fd60457f0dd8b334fdbbaaad Mon Sep 17 00:00:00 2001 From: rs <> Date: Wed, 1 Oct 2025 19:05:40 -0500 Subject: [PATCH] Fix step and run bugs in jtag debugger --- projects/nexys2_host_controller/host/jtag.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/projects/nexys2_host_controller/host/jtag.c b/projects/nexys2_host_controller/host/jtag.c index 175cd94..0ff2a0b 100644 --- a/projects/nexys2_host_controller/host/jtag.c +++ b/projects/nexys2_host_controller/host/jtag.c @@ -401,7 +401,11 @@ bool cpu_run(HIF hif) EC_FALSE(tap_reg_shift(hif, 64, false)); // Shift out ROM's BYPASS and all of USER1 up to MSB (HALT bit) - EC_FALSE(tap_reg_shift(hif, 138, false)); + EC_FALSE(tap_reg_shift(hif, 137, false)); + + // FPGA.USER1.WAIT + field_write(1, 1); + EC_FALSE(tap_reg_shift(hif, 1, false)); // FPGA.USER1.HALT field_write(1, 0); @@ -629,7 +633,7 @@ int main(int argc, char **argv) if (steps > 0) { EC_FALSE(cpu_halt(hif)); - for (size_t i = 0; i < 20; i++) + for (int i = 0; i < steps; i++) { EC_FALSE(cpu_step(hif)); EC_FALSE(cpu_state(hif)); -- 2.43.0