From: rs <>
Date: Sat, 28 Jun 2025 05:01:44 +0000 (-0500)
Subject: Add more documentation for PS2 and RS232 ifaces
X-Git-Url: https://git.the-white-hart.net/?a=commitdiff_plain;h=bc768c9302a31e43b404b62a32b8337808d45fa1;p=vhdl

Add more documentation for PS2 and RS232 ifaces
---

diff --git a/libraries/ps2/ps2_host.vhd b/libraries/ps2/ps2_host.vhd
index 00ea8b1..9177d75 100644
--- a/libraries/ps2/ps2_host.vhd
+++ b/libraries/ps2/ps2_host.vhd
@@ -1,4 +1,6 @@
 --------------------------------------------------------------------------------
+-- ps2_host - Host PS2 (keyboard/mouse) interface
+--------------------------------------------------------------------------------
 -- Notes:
 --
 -- The interface to the system is Wishbone-like - ACK and DAT signals are only
diff --git a/libraries/ps2/ps2_host_wb.vhd b/libraries/ps2/ps2_host_wb.vhd
index dbd0eac..eb7a599 100644
--- a/libraries/ps2/ps2_host_wb.vhd
+++ b/libraries/ps2/ps2_host_wb.vhd
@@ -1,4 +1,6 @@
 --------------------------------------------------------------------------------
+-- ps2_host_wb - Wishbone interface to host PS2 (keyboard/mouse) interface
+--------------------------------------------------------------------------------
 -- TODO: https://eecs.umich.edu/courses/doing_dsp/handout/SRL16E.pdf
 --       Play with using shift-registers to make this more dense
 --
@@ -64,6 +66,26 @@
 --
 -- FIXME: Missing OER signal (probably framing and parity errors too)
 --------------------------------------------------------------------------------
+-- WISHBONE DATASHEET
+--
+-- Wishbone specification used: Rev B.3
+-- Interface type: device
+-- Port size: 8-bit
+-- Operand sizes: 8-bit
+-- Endianness: undefined (port size same as granularity)
+-- Data transfer sequence: undefined
+-- Clock constraints: none
+-- Signals:
+-- * rst_i
+-- * clk_i
+-- * cyc_i
+-- * stb_i
+-- * we_i
+-- * ack_o
+-- * adr_i (3-bit)
+-- * dat_i (8-bit)
+-- * dat_o (8-bit)
+--------------------------------------------------------------------------------
 
 library ieee;
 use ieee.std_logic_1164.all;
diff --git a/libraries/rs232/rs232_rx.vhd b/libraries/rs232/rs232_rx.vhd
index 5090052..9b5a4b9 100644
--- a/libraries/rs232/rs232_rx.vhd
+++ b/libraries/rs232/rs232_rx.vhd
@@ -1,3 +1,7 @@
+--------------------------------------------------------------------------------
+-- rs232_rx - receiver for RS232 serial interface
+--------------------------------------------------------------------------------
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;
diff --git a/libraries/rs232/rs232_tx.vhd b/libraries/rs232/rs232_tx.vhd
index 7aa872a..760b0db 100644
--- a/libraries/rs232/rs232_tx.vhd
+++ b/libraries/rs232/rs232_tx.vhd
@@ -1,3 +1,7 @@
+--------------------------------------------------------------------------------
+-- rs232_tx - transmitter for RS232 serial interface
+--------------------------------------------------------------------------------
+
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.numeric_std.all;
diff --git a/libraries/rs232/rs232_uart.vhd b/libraries/rs232/rs232_uart.vhd
index ba6b3e9..69ce1a3 100644
--- a/libraries/rs232/rs232_uart.vhd
+++ b/libraries/rs232/rs232_uart.vhd
@@ -1,4 +1,6 @@
 --------------------------------------------------------------------------------
+-- rs232_uart - Wishbone UART for RS232 serial interface
+--------------------------------------------------------------------------------
 -- TODO: https://eecs.umich.edu/courses/doing_dsp/handout/SRL16E.pdf
 --       Play with using shift-registers to make this more dense
 --