Remove debug signals from CPU0 project

diff --git a/projects/cpu_0/nexys2_opt.vhd b/projects/cpu_0/nexys2_opt.vhd
index cbf8dd4934fda5f11f5d41384e0fe011a17e3eae..795f1e18732ac32d4dedaad4910f7063d753c270 100644 (file)
--- a/projects/cpu_0/nexys2_opt.vhd
+++ b/projects/cpu_0/nexys2_opt.vhd
@@ -188,18 +188,19 @@ begin
 
                        halt_i => sw(7),
                        step_i => deb_wait,
-                       pc_o  => deb_pc,
-                       ins_o => deb_ins,
-                       t_o   => deb_t,
-                       n_o   => deb_n,
-                       r_o   => deb_r
+                       pc_o  => open,--deb_pc,
+                       ins_o => open,--deb_ins,
+                       t_o   => open,--deb_t,
+                       n_o   => open,--deb_n,
+                       r_o   => open--deb_r
                );
 
        deb_wait <= debug_i(0);
-       with debug_i(2 downto 1) select debug_o <=
-               x"000000" & deb_ins & deb_pc when "00",
-               deb_n & deb_t                when "01",
-               x"00000000" & deb_r          when others;
+       debug_o <= (others => '0');
+       --with debug_i(2 downto 1) select debug_o <=
+       --      x"000000" & deb_ins & deb_pc when "00",
+       --      deb_n & deb_t                when "01",
+       --      x"00000000" & deb_r          when others;
 
        int_vec(7 downto 4) <= (others => '0');
        ints(0) <= '0';