Fix step and run bugs in jtag debugger

diff --git a/projects/nexys2_host_controller/host/jtag.c b/projects/nexys2_host_controller/host/jtag.c
index 175cd94f6ee8010e5ce0199936186baf1a00a164..0ff2a0b9117ae834a1af8b3811667da22534984d 100644 (file)
--- a/projects/nexys2_host_controller/host/jtag.c
+++ b/projects/nexys2_host_controller/host/jtag.c
@@ -401,7 +401,11 @@ bool cpu_run(HIF hif)
        EC_FALSE(tap_reg_shift(hif, 64, false));
 
        // Shift out ROM's BYPASS and all of USER1 up to MSB (HALT bit)
-       EC_FALSE(tap_reg_shift(hif, 138, false));
+       EC_FALSE(tap_reg_shift(hif, 137, false));
+
+       // FPGA.USER1.WAIT
+       field_write(1, 1);
+       EC_FALSE(tap_reg_shift(hif, 1, false));
 
        // FPGA.USER1.HALT
        field_write(1, 0);
@@ -629,7 +633,7 @@ int main(int argc, char **argv)
        if (steps > 0)
        {
                EC_FALSE(cpu_halt(hif));
-               for (size_t i = 0; i < 20; i++)
+               for (int i = 0; i < steps; i++)
                {
                        EC_FALSE(cpu_step(hif));
                        EC_FALSE(cpu_state(hif));