Add shift instructions to CPU0

diff --git a/projects/cpu_0/cpu.vhd b/projects/cpu_0/cpu.vhd
index e8fd785edc7f9a66d86fdc5918c7c26c08475de0..a5bc658ac42a25fadc9f1c1a7dfef5d6e16ee1b4 100644 (file)
--- a/projects/cpu_0/cpu.vhd
+++ b/projects/cpu_0/cpu.vhd
@@ -80,7 +80,7 @@ architecture behavioral of cpu is
        type mem_op_t  is (MEM_IMM8, MEM_IMM32, MEM_LD8, MEM_LD32, MEM_ST8, MEM_ST32, MEM_NONE);
        type adr_sel_t is (ADR_PC, ADR_T, ADR_T0, ADR_T1, ADR_T2, ADR_T3);
        type dat_sel_t is (DAT_N0, DAT_N1, DAT_N2, DAT_N3);
-       type alu_op_t  is (ALU_T, ALU_N, ALU_ADD, ALU_SUB, ALU_AND, ALU_OR, ALU_XOR, ALU_NOT, ALU_R, ALU_MDR, ALU_INTVEC);
+       type alu_op_t  is (ALU_T, ALU_N, ALU_ADD, ALU_SUB, ALU_AND, ALU_OR, ALU_XOR, ALU_NOT, ALU_R, ALU_MDR, ALU_INTVEC, ALU_LSR, ALU_ASR, ALU_SHL);
        type r_sel_t   is (R_T, R_PC, R_NC);
        type pc_sel_t  is (PC_MDR, PC_R, PC_INC, PC_NC, PC_INTVEC);
        type stackop_t is (ST_INC, ST_DEC, ST_NC);
@@ -810,6 +810,36 @@ begin
                        imask_set => '0', imask_clr => '1',
                        cond   => C_NONE
                ) when "00011010",
+               (  -- LSR
+                       mem_op => MEM_NONE,
+                       s_op   => ST_NC,
+                       r_op   => ST_NC,
+                       alu_op => ALU_LSR, t_to_n => '0',
+                       r_sel  => R_NC,
+                       pc_sel => PC_NC,
+                       imask_set => '0', imask_clr => '0',
+                       cond   => C_NONE
+               ) when "00011011",
+               (  -- ASR
+                       mem_op => MEM_NONE,
+                       s_op   => ST_NC,
+                       r_op   => ST_NC,
+                       alu_op => ALU_ASR, t_to_n => '0',
+                       r_sel  => R_NC,
+                       pc_sel => PC_NC,
+                       imask_set => '0', imask_clr => '0',
+                       cond   => C_NONE
+               ) when "00011100",
+               (  -- SHL
+                       mem_op => MEM_NONE,
+                       s_op   => ST_NC,
+                       r_op   => ST_NC,
+                       alu_op => ALU_SHL, t_to_n => '0',
+                       r_sel  => R_NC,
+                       pc_sel => PC_NC,
+                       imask_set => '0', imask_clr => '0',
+                       cond   => C_NONE
+               ) when "00011101",
                (  -- NOP
                        mem_op => MEM_NONE,
                        s_op   => ST_NC,
@@ -872,6 +902,9 @@ begin
                r_tos_reg           when ALU_R,
                mdr_reg             when ALU_MDR,
                x"000000" & vec_i   when ALU_INTVEC,
+               '0' & s_t_reg(s_t_reg'high downto 1) when ALU_LSR,
+               s_t_reg(s_t_reg'high) & s_t_reg(s_t_reg'high downto 1) when ALU_ASR,
+               s_t_reg(s_t_reg'high-1 downto 0) & '0' when ALU_SHL,
                (others => '0')     when others;