]> git.the-white-hart.net Git - vhdl/commit
Add reset logic and update clock syncs
authorrs <>
Wed, 12 Nov 2025 02:08:23 +0000 (20:08 -0600)
committerrs <>
Wed, 12 Nov 2025 02:08:23 +0000 (20:08 -0600)
commit2f3a0e2d96a54351b7642825e7e3fa528a0157da
treef5a35f774336d634fc95d9fd173d3ffd45b59812
parent12a67493af78c0b351875355e4ab8e3a19458a68
Add reset logic and update clock syncs
libraries/nexys2/tests/nexys2_usb.vhd
libraries/nexys2/usb.vhd
libraries/utility/fifo_xclk.vhd
libraries/utility/sync_rst.vhd [new file with mode: 0644]
libraries/utility/tests/test_sync_rst.vhd [new file with mode: 0644]
libraries/utility/xclk_sig.vhd
libraries/utility/xclk_vec.vhd